NXP Semiconductors /QN908XC /ADC /CH_CFG

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Interpret as CH_CFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CH_CFG

Description

ADC channel configuration register

Fields

CH_CFG

whenCH_CONFIG[N] is 0, the N channelwill select the configure 0 option(seeregister SD_CONFIG0). whenCH_CONFIG[N] is 1, the N channelwill select the configure 1 option(seeregister SD_CONFIG1).

Links

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